SiC Carrier Plate For LED Etching

Ⅰ. Material and structural design

Semixlab’s engineering choice of a high-purity isostatic graphite substrate with a thick, dense CVD Sic coating:

1. Graphite substrate offers very good bulk thermal conductivity, low specific weight, and excellent resistance to thermal shock - helping rapid thermal equalization across the carrier plate during pulsed or long etch cycles. Graphite also simplifies machining for precision features and locating geometries.

2. CVD SiC coating forms a chemically inert, wear-resistant surface that interfaces directly with plasma and wafer backside. Compared to bare graphite, the CVD SiC surface eliminates active sites, reduces carbon-related contamination, and dramatically improves resistance to halogen plasmas.

3. Combined outcome: The hybrid structure retains the thermal advantages and machinability of graphite while delivering the contamination control and surface durability of SiC.

Ⅱ. Common Challenges & Semixlab Solutions

1. Particle generation & surface contamination

Solution: Dense CVD SiC top layer +multi-stage nano-polish finish (typical Ra ≤0.2 μm). Outgassing and particulate tests performed pre-shipment; optional protective liners for further lifecycle protection.

2. Plasma erosion of carrier surface

Solution: Optimized CVD SiC thickness (customer-specified, typical 100-300 μm) and optional TaC sealing layers in extreme chemistries.Accelerated plasma life testing (process recipe simulation) before qualification.

3. Coating delamination or interface failures

Solution: Surface pre-treatments (cleaning+micro-texturing), graded adhesion interlayers, and low-stress deposition recipes to minimize thermal mismatch and residual stress.

4. Thermal distortion & warp during cycling

Solution: Finite-element-driven plate geometry, controlled substrate density selection, and post-fabrication annealing to relieve residual stresses.Available stiffening ribs or backing plates for extreme flatness requirements.

Typical Applications in LED Etch Processes

In LED etching process, the SiC Carrier Plate serves as the mechanical, thermal, and chemical interface between the wafer and the etching environment. Semixlab’s SiC Carrier Plate, built on a high-purity graphite substrate with a dense CVD SiC coating, is specifically engineered to ensure stable wafer temperature control, chemical resistance, and particle-free operation throughout repeated plasma cycles. Below is a breakdown of its key application scenarios within LED etching lines:

1. Wafer Support and Thermal Management in ICP/RIE Etching

In LED etching equipment such as SAMCO, Oxford Instruments, and LAM ICP etchers, wafers (commonly 2–8 inches, including GaN-on-Sapphire or GaN-on-Si substrates) are mounted on the SiC carrier plate.

The carrier must provide:

● Uniform heat transfer between the wafer and the electrostatic chuck (ESC) or mechanical clamp;

● Excellent flatness to ensure consistent plasma exposure and etch depth control;

● High thermal conductivity (derived from the graphite core) to eliminate localized overheating (“hot spots”) that can lead to etch non-uniformity or defect formation.

Semixlab’s hybrid structure provides a stable temperature profile (±1°C across the wafer surface), allowing precise control of etch rate and selectivity—critical for maintaining LED mesa geometry and sidewall smoothness.

2. Backside Thermal Conduction and Wafer Protection

In many LED etch chambers, wafers are mounted face-down, and the carrier plate provides backside thermal conduction to maintain temperature uniformity. Even minor non-uniformities in thermal contact can lead to:

● Etch rate deviation;

● Photoresist burning;

● Non-uniform mesa height—all of which degrade LED yield.

Semixlab’s mirror-finished CVD SiC coating ensures intimate wafer contact, while the graphite substrate buffers thermal shocks during recipe transitions (e.g., between etch and cooling steps).

This combination minimizes wafer stress and prevents microcracks in brittle sapphire or GaN substrates.

3. Mechanical Alignment and Chamber Compatibility

SiC carrier plates also function as precision mechanical interfaces between the wafer and the process chamber hardware.

The graphite core’s lightweight and machinable nature enables complex geometries—such as alignment holes, recesses, and backside channels—allowing perfect integration with diverse tool configurations.

Semixlab’s design ensures:

● Dimensional compatibility with multi-wafer batch etchers and single-wafer tools;

● Easy wafer loading/unloading with robotic arms;

● Reduced mechanical stress on fragile GaN wafers during transfer cycles.